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Abstract

Scaling of the predominant silicon complementary metal-oxide semiconductor (CMOS) technology is finally approaching an end after decades of exponential growth. This review explores the reasons for this limit and some of the strategies available to the semiconductor industry to continue the technology extension. Evolutionary change to the silicon transistor will be pursued as long as possible, with increasing demands being placed on materials. Eventually new materials such a silicon-germanium may be used, and new device topologies such as the double-gated transistor may be employed. These strategies are being pursued in research organizations today. It is likely that planar technology will reach its limit with devices on the 10-nm scale, and then the third dimension will have to be exploited more efficiently to achieve further performance and density improvements.

Keyword(s): limitsminiaturizationscalingsiliconVLSI
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/content/journals/10.1146/annurev.matsci.30.1.681
2000-08-01
2024-04-19
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  • Article Type: Review Article
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